Prior art amplifier circuits for capacitive transducers suffer from an unfortunate and inconvenient trade-off between low noise and fast settling time, i.e., the period of time the amplifier circuit requires for reaching its predetermined or steady-state small signal gain within 1 dB error margin after power supply voltage has been applied to the amplifier circuit.
One reason for this not entirely satisfactory situation is that opposing requirements between these performance measures exist.
At one hand, a very large input impedance of the amplifier circuit is necessary and highly desirable to optimise noise performance of the amplifier circuit.
The very large input impedance also prevents the amplifier circuit represents a significant load to the capacitive transducer which would lower output signal voltage of the capacitive transducer. On the other hand, a large settling time of the combined transducer and amplifier system is created by the combination of the very large input impedance of the amplifier circuit and the inherent capacitance of the capacitive transducer.
The large settling time is caused by a time constant of the combined capacitive transducer and amplifier that may reach a value of 10-30 seconds, or even minutes, if the input impedance of the amplifier circuit is sufficiently large to provide optimal noise performance with today's miniature capacitive transducers.
At power-on, where supply voltage is abruptly applied to the combined transducer and amplifier assembly, the amplifier circuit may be momentarily over-loaded and subsequently left in a non-operational state for unacceptable time periods during settling of the amplifier circuit until DC operating points of the amplifier circuit have been recovered. This power-on related problem is additionally reinforced by an associated lack of ability to withstand high-level acoustical signals such as low-frequency transients generated by door slams or mechanical shocks, etc. These types of high-level transients are regularly encountered during normal operation of an amplifier circuit inside a capacitive transducer and may drive instantaneous operating points of the amplifier circuit far away from their respective predetermined DC operating points, e.g. close to a supply rail. Under such adverse circumstances, a miniature microphone utilising the combined transducer and amplifier circuit may be rendered partly or completely non-operational during an extended time period.
To achieve optimal noise performance of today's miniature electret microphones, a resistive part of the input impedance of the amplifier circuit should preferably larger than 100 GΩ, or even more preferably larger than 300 GΩ. Since an input of the amplifier circuit must be operatively connected to the capacitive transducer, which may exhibit a source capacitance as small as 0.5 pF to 2.0 pF, a resistance within the above-mentioned range of magnitude is highly desirable. Furthermore, continuing reductions in outer dimensions of capacitive transducers, such as the advent of MEMS-based capacitive transducers, call for improved amplifier circuits with larger input resistance and/or better noise performance than prior art amplifier circuits to avoid comprising the performance of these small capacitive transducer element.
In prior art preamplifier designs for use with capacitive transducers, the settling time has conventionally been controlled or set by determining a minimum acceptable input resistance for a selected target noise level. U.S. Pat. No. 5,097,224 discloses a preamplifier with an input terminal set to an appropriate DC operating point, or bias point, by a non-linear device formed by a pair of cross-coupled diodes connected to a tapping point of a resistive voltage divider coupled between a supply and ground rail. The cross-coupled diode pair exhibit very high resistance due to their exponential V-I characteristic when the absolute voltage across the cross-coupled is near zero, i.e. limited to a few times kT/q (˜25 mV at room temperature). U.S. Pat. No. 5,861,779 discloses a microphone preamplifier which comprises an alternative biasing scheme wherein bipolar or MOS transistors are coupled between an internal node of the preamplifier and an input terminal of the preamplifier to create a non-linear device for biasing the input of the preamplifier.
Finally, the paper “A Low-Power Low-Noise CMOS Amplifier for Neural Recording Applications” IEEE Journal of Solid State-Circuits Vol. 38, No 6 discloses a biosignal amplifier that comprises a pair of diode-coupled MOS transistors coupled between an input node and an output node of the preamplifier to create a non-linear device for biasing the input node of the preamplifier.
These prior art preamplifier bias schemes suffer from long settling times because none of the disclosed bias arrangements provides sufficient control of impedances of the utilized non-linear devices during preamplifier settling. Furthermore, these prior art preamplifier bias schemes utilize bias control means that are integral to the respective preamplifiers and lack an external reference circuit that can provide a stable reference measure for the bias control means in situations where the preamplifier has been overloaded and left in a non-operational state. This prior art bond between the bias control means and preamplifier DC bias voltages restricts the ability to independently optimize parameters of the bias control means for improved settling performance of the preamplifier circuits.